1. Field of the Invention
The present invention relates generally to silicon-on-insulator structures, and more specifically to processing a polarizable layer in the buried oxide of silicon-on-insulator substrates for the fabrication of non-volatile memory.
2. Discussion of the Background
There are various types of commercial non-volatile memory that have been fabricated on bulk silicon, but no commercial non-volatile memories have been fabricated on SOI substrates that utilize a polarizable layer in the buried oxide in their operation.
Two known techniques for forming the buried oxide layer in SOI substrates are the implantation of oxygen ions in the separation-by-implantation-of-oxygen process (SIMOX) and the method of first growing a thermal oxide and then bonding. The difficulty is that the buried oxide formed using either of these commercial processes are non-polarizable.
The test for the polarizability of the buried oxide is (1) the fabrication of point-contact transistors, (2) measurement of the transistor characteristics, (3) application of a positive poling voltage to the back-gate or drain above the operating voltage and (4) remeasurement of the transistor characteristics. The procedure is then repeated, where a negative poling voltage of the same magnitude is applied to the back-gate or drain. Any significant reproducible hysteresis in the transistor characteristics indicates that the buried oxide has been polarized. These measurements were performed on a wide range of commercially available SOI substrates, and demonstrate that the buried oxides of these substrates are non-polarizable.
In the SIMOX process, a thin layer of a monocrystalline silicon substrate is separated from the bulk of the substrate by implanting oxygen ions into the substrate to form a buried dielectric layer. The SIMOX process provides a heterostructure in which a buried silicon dioxide layer serves as a highly effective insulator for surface layer electronic devices.
In the SIMOX process, oxygen ions are implanted into silicon, after which the material is annealed to form the buried silicon dioxide layer or BOX region. The annealing phase redistributes the oxygen ions such that the silicon/silicon dioxide boundaries become smoother and more abrupt, thus forming a sharp and well-defined BOX region.
One important criterion for SIMOX wafers is the defect density, which should be minimized in order to produce high quality wafers. Defect density can be defined in terms of the departure from perfect crystallinity in the silicon layer that is separated from the bulk substrate by the buried oxide layer. In general, as the oxygen ions are implanted into the wafer to produce the buried SiO2 layer, atomic silicon is displaced. Additionally, excess silicon atoms from the growing BOX region can alter the crystal structure of the top silicon layer resulting in a variety of point and extended defects, such as threading dislocations and stacking faults, during the ion implantation and/or annealing processes. These defects degrade the quality and reliability of devices, e.g., transistors, that are subsequently formed in the upper silicon layer.
It is known that, in the SIMOX substrate, structure and quality of the buried oxide layer formed under the top silicon layer by implanting the oxygen ions into the single-crystal silicon substrate depend on an ion implanting quantity (dose of ions), so that the dose of oxygen ions as 1017–1018/cm2 is required in order to form the buried oxide layer having the abrupt interface. But, there is the disadvantage of producing crystal defects in the top single-crystal silicon layer when the dose of ions is increased, and observing the relation of a crystal dislocation density and the dose of ions, when the dose of ions reaches over 1.0×1018/cm2, the dislocation density is increased and crystal quality of the top silicon layer where device elements are formed is inferior. When the dose of ions is controlled within the range between 0.5×1018/cm2 and less than 1.0×1018/cm2 in order not to produce the crystal defect, a breakdown electric field of the buried oxide layer is smaller and the breakdown voltage is decreased. Consequently, as a condition capable of obtaining the high breakdown electric field of the buried oxide layer and of achieving the low dislocation density in the top silicon layer, at an acceleration energy of 150–200 keV, for example, the ion implantation has been practiced by setting the dose of ions at around 0.4×1018/cm2 (J. Mater. Res., Vol. 8, No. 3, 1993 pp. 524–534).
At least one disadvantage is that the buried oxide layer is non-polarizable. There exists a need for a method of creating a polarizable layer in the buried oxide of silicon-on-insulator substrates.
If a polarizable layer is formed in the buried oxide, then the polarizable layer/buried oxide combination can be used for the fabrication of non-volatile memory.